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single-supply, rail-to-rail low power fet-input op amp AD822-EP rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2010 analog devices, inc. all rights reserved. features true single-supply operation input voltage range extends below ground output swings rail-to-rail single-supply capability from 5 v to 30 v dual-supply capability from 2.5 v to 15 v high load drive capacitive load drive of 350 pf, g = +1 minimum output current of 15 ma excellent ac performance for low power 800 a maximum quiescent current per amplifier unity-gain bandwidth: 1.8 mhz slew rate of 3 v/s good dc performance 800 v maximum input offset voltage 2 v/c typical offset voltage drift 25 pa maximum input bias current low noise 13 nv/hz @ 10 khz no phase inversion enhanced product features supports defense and aerospace applications (aqec standard) military temperature range (?55c to +125c) controlled manufacturing baseline one assembly/test site one fabrication site enhanced product change notification qualification data available on request applications photodiode preamps active filters 12-bit to 14-bit data acquisition systems low power references and regulators connection diagram 1 2 3 4 8 7 6 5 AD822-EP out1 ?in1 +in1 v? v+ out2 ?in2 +in2 09208-001 figure 1. 8-lead soic_n (r suffix) general description the AD822-EP is a dual precision, low power fet input op amp that can operate from a single supply of 5 v to 30 v or dual supplies of 2.5 v to 15 v. it has true single-supply capability with an input voltage range extending below the negative rail, allowing the ad822 to accommodate input signals below ground in the single-supply mode. output voltage swing extends to within 10 mv of each rail, providing the maximum output dynamic range. frequency (hz) 1 10 10k 1k 100 input voltage noise (nv/ hz) 100 10 09208-002 figure 2. input voltage noise vs. frequency offset voltage of 800 v maximum, offset voltage drift of 2 v/c, input bias currents below 25 pa, and low input voltage noise provide dc precision with source impedances up to a gigaohm. the 1.8 mhz unity-gain bandwidth, C93 db thd at 10 khz, and 3 v/s slew rate are provided with a low supply current of 800 a per amplifier.
AD822-EP rev. 0 | page 2 of 20 table of contents features .............................................................................................. 1 ? enhanced product features ............................................................ 1 ? applications....................................................................................... 1 ? connection diagram ....................................................................... 1 ? general description ......................................................................... 1 ? revision history ............................................................................... 2 ? specifications..................................................................................... 4 ? absolute maximum ratings ......................................................... 10 ? thermal resistance .................................................................... 10 ? esd caution................................................................................ 10 ? typical performance characteristics ........................................... 11 ? outline dimensions ....................................................................... 18 ? ordering guide .......................................................................... 18 ? revision history 6/10revision 0: initial version
AD822-EP rev. 0 | page 3 of 20 the AD822-EP drives up to 350 pf of direct capacitive load as a follower and provides a minimum output current of 15 ma. this allows the amplifier to handle a wide range of load conditions. its combination of ac and dc performance, plus the outstanding load drive capability, results in an exceptionally versatile amplifier for the single-supply user. the AD822-EP operates over the military temperature range of ?55c to +125c. the AD822-EP is offered in an 8-lead soic_n package. full details about this enhanced product are available in the ad822 data sheet, which should be consulted in conjunction with this data sheet. 90 10 . .... .... .... .... .... .... .... .... .... .... .... .... .... .... .... .... .... .... .... .... v out 5v 0v (gnd) 1v 20s 1v 1v 0 9208-003 0% 100 figure 3. gain-of-2 amplifier; v s = 5 v, 0 v, v in = 2.5 v sine centered at 1.25 v, r l = 100
AD822-EP rev. 0 | page 4 of 20 specifications v s = 0 v, 5 v @ t a = 25c, v cm = 0 v, v out = 0.2 v, unless otherwise noted. table 1. t grade parameter test conditions/comments min typ max unit dc performance initial offset 0.1 0.8 mv maximum offset over temperature 0.5 1.2 mv offset drift 2 v/c input bias current v cm = 0 v to 4 v 2 25 pa at t max 0.5 6 na input offset current 2 20 pa at t max 0.5 na open-loop gain v out = 0.2 v to 4 v r l = 100 k 500 1000 v/mv t min to t max 400 v/mv r l = 10 k 80 150 v/mv t min to t max 80 v/mv r l = 1 k 15 30 v/mv t min to t max 10 v/mv noise/harmonic performance input voltage noise f = 0.1 hz to 10 hz 2 v p-p f = 10 hz 25 nv/hz f = 100 hz 21 nv/hz f = 1 khz 16 nv/hz f = 10 khz 13 nv/hz input current noise f = 0.1 hz to 10 hz 18 fa p-p f = 1 khz 0.8 fa/hz harmonic distortion r l = 10 k to 2.5 v f = 10 khz v out = 0.25 v to 4.75 v ?93 db dynamic performance unity-gain frequency 1.8 mhz full power response v out p-p = 4.5 v 210 khz slew rate 3 v/s settling time to 0.1% v out = 0.2 v to 4.5 v 1.4 s to 0.01% v out = 0.2 v to 4.5 v 1.8 s matching characteristics initial offset 1.0 mv maximum offset over temperature 1.6 mv offset drift 3 v/c input bias current 20 pa crosstalk @ f = 1 khz r l = 5 k ?130 db crosstalk @ f = 100 khz r l = 5 k ?93 db
AD822-EP rev. 0 | page 5 of 20 t grade parameter test conditions/comments min typ max unit input characteristics input voltage range 1 , t min to t max ?0.2 +4 v common-mode rejection ratio (cmrr) v cm = 0 v to 2 v 66 80 db t min to t max v cm = 0 v to 2 v 66 db input impedance differential 10 13 ||0.5 ||pf common mode 10 13 ||2.8 ||pf output characteristics output saturation voltage 2 v ol ? v ee i sink = 20 a 5 7 mv t min to t max 10 mv v cc ? v oh i source = 20 a 10 14 mv t min to t max 20 mv v ol ? v ee i sink = 2 ma 40 55 mv t min to t max 80 mv v cc ? v oh i source = 2 ma 80 110 mv t min to t max 160 mv v ol C v ee i sink = 15 ma 300 500 mv t min to t max 1000 mv v cc ? v oh i source = 15 ma 800 1500 mv t min to t max 1900 mv operating output current 15 ma t min to t max 12 ma capacitive load drive 350 pf power supply quiescent current, t min to t max 1.24 1.6 ma power supply rejection v+ = 5 v to 15 v 66 80 db t min to t max 66 db 1 this is a functional specification. amplifier bandwidth decrea ses when the input common-mode voltage is driven in the range (v + ? 1 v) to v+. common-mode error voltage is typically less than 5 mv with the common-mode voltage set at 1 v below the positive supply. 2 v ol ? v ee is defined as the difference between the lowest possible output voltage (v ol ) and the negative voltage supply rail (v ee ). v cc ? v oh is defined as the difference between the highest possible output voltage (v oh ) and the positive supply voltage (v cc ).
AD822-EP rev. 0 | page 6 of 20 v s = 5 v @ t a = 25c, v cm = 0 v, v out = 0 v, unless otherwise noted. table 2. t grade parameter test conditions/comments min typ max unit dc performance initial offset 0.1 0.8 mv maximum offset over temperature 0.5 1.5 mv offset drift 2 v/c input bias current v cm = ?5 v to +4 v 2 25 pa at t max 0.5 6 na input offset current 2 20 pa at t max 0.5 na open-loop gain v out = ?4 v to +4 v r l = 100 k 400 1000 v/mv t min to t max 400 v/mv r l = 10 k 80 150 v/mv t min to t max 80 v/mv r l = 1 k 20 30 v/mv t min to t max 10 v/mv noise/harmonic performance input voltage noise f = 0.1 hz to 10 hz 2 v p-p f = 10 hz 25 nv/hz f = 100 hz 21 nv/hz f = 1 khz 16 nv/hz f = 10 khz 13 nv/hz input current noise f = 0.1 hz to 10 hz 18 fa p-p f = 1 khz 0.8 fa/hz harmonic distortion r l = 10 k f = 10 khz v out = 4.5 v ?93 db dynamic performance unity-gain frequency 1.9 mhz full power response v out p-p = 9 v 105 khz slew rate 3 v/s settling time to 0.1% v out = 0 v to 4.5 v 1.4 s to 0.01% v out = 0 v to 4.5 v 1.8 s matching characteristics initial offset 1.0 mv maximum offset over temperature 3 mv offset drift 3 v/c input bias current 25 pa crosstalk @ f = 1 khz r l = 5 k ?130 db crosstalk @ f = 100 khz r l = 5 k ?93 db input characteristics input voltage range 1 , t min to t max ?5.2 +4 v common-mode rejection ratio (cmrr) v cm = ?5 v to +2 v 66 80 db t min to t max v cm = ?5 v to +2 v 66 db input impedance differential 10 13 ||0.5 ||pf common mode 10 13 ||2.8 ||pf
AD822-EP rev. 0 | page 7 of 20 t grade parameter test conditions/comments min typ max unit output characteristics output saturation voltage 2 v ol ? v ee i sink = 20 a 5 7 mv t min to t max 10 mv v cc ? v oh i source = 20 a 10 14 mv t min to t max 20 mv v ol ? v ee i sink = 2 ma 40 55 mv t min to t max 80 mv v cc ? v oh i source = 2 ma 80 110 mv t min to t max 160 mv v ol ? v ee i sink = 15 ma 300 500 mv t min to t max 1000 mv v cc ? v oh i source = 15 ma 800 1500 mv t min to t max 1900 mv operating output current 15 ma t min to t max 12 ma capacitive load drive 350 pf power supply quiescent current, t min to t max 1.3 1.6 ma power supply rejection v sy = 5 v to 15 v 66 80 db t min to t max 66 db 1 this is a functional specification. amplifier bandwidth decrea ses when the input common-mode voltage is driven in the range (v + ? 1 v) to v+. common-mode error voltage is typically less than 5 mv with the common-mode voltage set at 1 v below the positive supply. 2 v ol ? v ee is defined as the difference between the lowest possible output voltage (v ol ) and the negative voltage supply rail (v ee ). v cc ? v oh is defined as the difference between the highest possible output voltage (v oh ) and the positive supply voltage (v cc ).
AD822-EP rev. 0 | page 8 of 20 v s = 15 v @ t a = 25c, v cm = 0 v, v out = 0 v, unless otherwise noted. table 3. t grade parameter test conditions/comments min typ max unit dc performance initial offset 0.4 2 mv maximum offset over temperature 0.5 3 mv offset drift 2 v/c input bias current v cm = 0 v 2 25 pa v cm = ?10 v 40 pa at t max v cm = 0 v 0.5 6 na input offset current 2 20 pa at t max 0.5 na open-loop gain v out = ?10 v to +10 v r l = 100 k 500 2000 v/mv t min to t max 500 v/mv r l = 10 k 100 500 v/mv t min to t max 100 v/mv r l = 1 k 30 45 v/mv t min to t max 20 v/mv noise/harmonic performance input voltage noise f = 0.1 hz to 10 hz 2 v p-p f = 10 hz 25 nv/hz f = 100 hz 21 nv/hz f = 1 khz 16 nv/hz f = 10 khz 13 nv/hz input current noise f = 0.1 hz to 10 hz 18 fa p-p f = 1 khz 0.8 fa/hz harmonic distortion r l = 10 k f = 10 khz v out = 10 v ?85 db dynamic performance unity-gain frequency 1.9 mhz full power response v out p-p = 20 v 45 khz slew rate 3 v/s settling time to 0.1% v out = 0 v to 10 v 4.1 s to 0.01% v out = 0 v to 10 v 4.5 s matching characteristics initial offset 3 mv maximum offset over temperature 4 mv offset drift 3 v/c input bias current 25 pa crosstalk @ f = 1 khz r l = 5 k ?130 db crosstalk @ f = 100 khz r l = 5 k ?93 db input characteristics input voltage range 1 , t min to t max ?15.2 +14 v common-mode rejection ratio (cmrr) v cm = ?15 v to +12 v 70 80 db t min to t max v cm = ?15 v to +12 v 70 db input impedance differential 10 13 ||0.5 ||pf common mode 10 13 ||2.8 ||pf
AD822-EP rev. 0 | page 9 of 20 t grade parameter test conditions/comments min typ max unit output characteristics output saturation voltage 2 v ol ? v ee i sink = 20 a 5 7 mv t min to t max 10 mv v cc ? v oh i source = 20 a 10 14 mv t min to t max 20 mv v ol ? v ee i sink = 2 ma 40 55 mv t min to t max 80 mv v cc ? v oh i source = 2 ma 80 110 mv t min to t max 160 mv v ol ? v ee i sink = 15 ma 300 500 mv t min to t max 1000 mv v cc ? v oh i source = 15 ma 800 1500 mv t min to t max 1900 mv operating output current 20 ma t min to t max 15 ma capacitive load drive 350 pf power supply quiescent current, t min to t max 1.4 1.8 ma power supply rejection v sy = 5 v to 15 v 70 80 db t min to t max 70 db 1 this is a functional specification. amplifier bandwidth decrea ses when the input common-mode voltage is driven in the range (v + ? 1 v) to v+. common-mode error voltage is typically less than 5 mv with the common-mode voltage set at 1 v below the positive supply. 2 v ol ? v ee is defined as the difference between the lowest possible output voltage (v ol ) and the negative voltage supply rail (v ee ). v cc ? v oh is defined as the difference between the highest possible output voltage (v oh ) and the positive supply voltage (v cc ).
AD822-EP rev. 0 | page 10 of 20 absolute maximum ratings table 4. parameter rating supply voltage 18 v internal power dissipation 8-lead soic_n (r) observe maximum junction temperature input voltage ((v+) + 0.2 v) to ((v?) ? 20 v) output short-circuit duration indefinite differential input voltage 30 v storage temperature range (r) C65c to +150c operating temperature range ?55c to +125c maximum junction temperature 150c lead temperature (soldering, 60 sec) 260c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. table 5. thermal resistance package type ja jc unit 8-lead soic_n (r) 160 43 c/w esd caution
AD822-EP rev. 0 | page 11 of 20 typical performance characteristics offset voltage (mv) 70 0 ?0.5 ?0.4 number of units ?0.3 ?0.2 ?0.1 0 60 50 40 30 20 10 0.10.20.30.40.5 v s = 0v, 5v 09208-004 figure 4. typical distribution of offset voltage (390 units) offset voltage drift (v/c) 16 6 0 ?12 10 ?10 % in bin ?8 ?6 ?4 ?2 14 8 4 2 12 10 86420 v s = 5v v s = 15v 09208-005 figure 5. typical distribution of offset voltage drift (100 units) input bias current (pa) 50 20 0 1 number of units 45 25 15 5 35 30 10 40 0 2345678 910 09208-006 figure 6. typical distribution of input bias current (213 units) common-mode voltage (v) 5 0 ?5 ?5 5 ?4 input bias current (pa) ?3 ?2 ?1 0 1 2 3 4 v s = 5v v s = 0v, +5v and 5v 09208-007 figure 7. input bias current vs. common-mode voltage; v s = 5 v, 0 v, and v s = 5 v common-mode voltage (v) 1k 100 0.1 ?16 16 ?12 input bias current (pa) ?8 ?4 0 4 8 12 10 1 09208-008 figure 8. input bias current vs. common-mode voltage; v s = 15 v temperature (c) 100k 0.1 20 140 40 input bias current (pa) 60 80 100 120 10k 1k 100 10 1 09208-009 figure 9. input bias current vs. temperature; v s = 5 v, v cm = 0 v
AD822-EP rev. 0 | page 12 of 20 load resistance ( ? ) 10m 1m 10k 100 100k open-loop gain (v/v) 100k 1k 10k v s = 0v, +5v v s = 15v v s = 0v, +3v 09208-010 figure 10. open-loop gain vs. load resistance temperature (c) 10m 1m 10k ?60 140 ?40 open-loop gain (v/v) ?20 0 20 40 60 80 100 120 100k r l = 100k ? r l = 10k ? r l = 600 ? v s = 15v v s = 0v, +5v v s = 15v v s = 0v, +5v v s = 15v v s = 0v, +5v 09208-011 figure 11. open-loop gain vs. temperature output voltage (v) 300 ?300 ?16 16 ?12 input error voltage (v) ?8 ?4 0 4 8 12 200 100 0 ?100 ?200 r l = 100k ? r l = 10k ? r l = 600 ? 09208-012 figure 12. input error voltage vs. output voltage for resistive loads output voltage from supply rails (mv) 40 20 ?40 60 input error voltage (v) 120 180 240 0 ?20 pos rail neg rail neg rail neg rail pos rail r l = 20k ? r l = 2k ? r l = 100k ? pos rail 03 09208-013 0 0 figure 13. input error voltage with outp ut voltage within 300 mv of either supply rail for various resistive loads; v s = 5 v frequency (hz) 1k 100 1 10 1k 10 1 10k 100 input voltage noise (nv/ hz) 09208-014 figure 14. input voltage noise vs. frequency frequency (hz) ? 40 ?50 ?110 100 100k 1k thd (db) 10k ?70 ?80 ?90 ?100 ?60 r l = 10k ? a cl = ?1 v s = 0v, +3v; v out = 2.5v p-p v s = 15v; v out = 20v p-p v s = 5v; v out = 9v p-p v s = 0v, +5v; v out = 4.5v p-p 09208-015 figure 15. total harmonic distortion (thd) vs. frequency
AD822-EP rev. 0 | page 13 of 20 frequency (hz) 100 ?20 80 60 40 20 0 10 10m 100 open-loop gain (db) 1k 10k 100k 1m 100 ?20 80 60 40 20 0 phase margin (degrees) phase gain c l = 100pf r l = 2k ? 09208-016 figure 16. open-loop gain and phase margin vs. frequency frequency (hz) 1k 100 100 10m 1k output impedance ( ? ) 10k 100k 1m 10 1 0.1 0.01 a cl = +1 v s = 15v 09208-017 figure 17. output im pedance vs. frequency settling time (s) 16 12 ?16 05 1 output swing from 0 to volts 234 0 ?4 ?8 ?12 8 4 error 1% 0.1% 1% 0.01% 0.01% 0 9208-018 figure 18. output swing and error vs. settling time 90 80 0 40 30 20 10 60 50 70 common-mode rejection (db) frequency (hz) 10m 100 1k 10k 100k 1m 10 v s = 15v v s = 0v, +5v v s = 0v, +3v 09208-019 figure 19. common-mode rejection vs. frequency +125c ?55c +25c positive rail negative rail common-mode voltage from supply rails (v) 5 4 0 ?1 3 common-mode error voltage (mv) 3 2 1 ?55c +125c 2 1 0 09208-020 figure 20. absolute common-mode error vs. common-mode voltage from supply rails (v s ? v cm ) load current (ma) 1000 100 0 0.001 100 0.01 output s a tu r a tion vol t age (mv) 0.1 1 10 10 v s ? v oh v ol ? v s 09208-021 figure 21. output saturation voltage vs. load current
AD822-EP rev. 0 | page 14 of 20 temperature (c) 1000 100 1 ?60 140 ?40 output s a tur a tion vol t age (mv) ?20 0 20 40 60 80 100 120 10 i source = 10ma i sink = 10ma i source = 1ma i sink = 1ma i source = 10a i sink = 10a 09208-022 figure 22. output saturation voltage vs. temperature temperature (c) 80 40 0 ?60 140 ?40 ?20 0 20 40 60 80 100 120 short-circuit current limit (ma) 70 60 20 10 50 30 + ? ? + + ?out v s = 15v v s = 15v v s = 0v, +5v v s = 0v, +3v v s = 0v, +5v v s = 0v, +3v 09208-023 figure 23. short-circuit cu rrent limit vs. temperature total supply voltage (v) 1600 0 4 quiescent current (a) 1400 800 600 400 200 1200 1000 t = +125c t = +25c t = ?55c 363228 24 2016 12 08 09208-024 figure 24. quiescent current vs. supply voltage vs. temperature frequency (hz) 100 0 10 10m 100 power supply rejection (db) 1k 10k 100k 1m 90 60 30 20 10 80 70 50 40 +psrr ?psrr 09208-025 figure 25. power supply rejection vs. frequency frequency (hz) 30 25 0 10k 10m 100k output vol t age (v) 1m 20 15 10 5 v s = 15v v s = 0v, +5v v s = 0v, +3v r l = 2k ? 09208-026 figure 26. large signal frequency response
AD822-EP rev. 0 | page 15 of 20 frequency (hz) ? 70 ?140 300 1m 1k 3k 10k 30k 100k 300k ?80 ?100 ?110 ?120 ?130 ?90 crosstalk (db) 09208-028 figure 27. crosstalk vs. frequency v in r l v out 100pf 8 v + 0.01f 4 0.01f 1/2 AD822-EP + ? 09208-029 figure 28. unity-gain follower 0% 90 100 5v 10s 10 09208-030 figure 29. 20 v p-p, 25 khz sine wave input; unity-gain follower; v s = 15 v, r l = 600 v+ 20v p-p 2 3 8 5 6 20k ? 2.2k ? 5k ? 5k ? v out crosstalk = 20 log v out 10v in 0.1f 1f 0.1f 1f v? v in + ? 1/2 AD822-EP 1/2 AD822-EP 1 + ? 7 09208-031 figure 30. crosstalk test circuit 5v 5s 09208-032 0% 90 100 10 figure 31. large signal response unity-gain follower; v s = 15 v, r l = 10 k 10mv 500ns 09208-033 0% 90 100 10 figure 32. small signal response unity-gain follower; v s = 15 v, r l = 10 k gnd 1v 2s 09208-034 0% 90 100 10 figure 33. v s = 5 v, 0 v; unity-gain follower response to 0 v to 4 v step 4 v in r l v out 100pf 8 v + 0.01f 1/2 AD822-EP + ? 09208-035 figure 34. unity-gain follower
AD822-EP rev. 0 | page 16 of 20 20k? 10k? 4 100pf v in r l v out 8 v+ 0.01f + ? 1/2 AD822-EP 09208-036 figure 35. gain-of-two inverter gnd 2s 1v 09208-037 0% 90 100 10 figure 36. v s = 5 v, 0 v; unity-gain follower response to 0 v to 5 v step gnd 10mv 2s 09208-038 0% 90 100 10 figure 37. v s = 5 v, 0 v; unity-gain follower response to 40 mv step, centered 40 mv above ground, r l = 10 k gnd 10 100 10mv 2s 0 9208-039 90 0% figure 38. v s = 5 v, 0 v; gain-of-2 inverter response to 20 mv step, centered 20 mv below ground, r l = 10 k gnd 10 100 1v 2s 09208-040 figure 39. v s = 5 v, 0 v; gain-of-2 inverter response to 2.5 v step, centered ?1.25 v below ground, r l = 10 k g nd 500mv 10s 09208-041 10 100 90 0% figure 40. v s = 3 v, 0 v; gain-of-2 inverter, v in = 1.25 v, 25 khz, sine wave centered at ?0.75 v, r l = 600
AD822-EP rev. 0 | page 17 of 20 (a) gnd v in v out 5v r p .... .... .... .... .... .... .... .... .... .... .... .... .... .... .... .... .... .... .... .... 1v 10s 1v (b) gnd +v s .... .... .... .... ... ... .... .... .... .... .... .... .... .... .... .... .... .... .... .... 1v 10s 1v 1v 09208-042 10 100 90 0% 10 100 90 0% figure 41. (a) response with r p = 0; v in from 0 v to +v s (b) v in = 0 v to +v s + 200 mv v out = 0 v to +v s r p = 49.9 k
AD822-EP rev. 0 | page 18 of 20 outline dimensions controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-aa 012407-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 42. 8-lead standard small outline package [soic_n] narrow body (r-8) dimensions shown in millimeters and (inches) ordering guide model 1 temperature range package description package option ad822trz-ep ?55c to +125c 8-lead soic_n r-8 ad822trz-ep-r7 ?55c to +125c 8-lead soic_n r-8 1 z = rohs compliant part. spice model is available at www.analog.com .
AD822-EP rev. 0 | page 19 of 20 notes
AD822-EP rev. 0 | page 20 of 20 notes ?2010 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d09208-0-6/10(0)

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